A semiconductor device having p-channel type and n-channel type thin film transistors (TFTs) formed on the same substrate, and an electronic device equipped with such a semiconductor device have been developed.
In an active matrix liquid crystal display device or an organic EL display device, for example, a technique for integrally forming a driver circuit on an active matrix substrate has been proposed. A typical driver circuit uses a CMOS (Complementary Metal Oxide Semiconductor) that includes a p-channel type TFT (abbreviated to “p-type TFT” below) and an n-channel type TFT (abbreviated to “n-type TFT” below). In order to prevent an occurrence of a leak current in the configuration using the CMOS, driving voltages of the respective TFTs need to be adjusted such that the two types of TFTs, which constitute the CMOS, are both turned off when the gate voltage is not applied. Also, from the perspective of reducing power consumption, the driving voltages of the TFTs need to be minimized.
Patent Document 1 discloses a technique for providing a memory circuit in each pixel on the active matrix substrate in an active matrix liquid crystal display device or an organic EL display device. With this configuration, image data of each pixel can be stored in the memory circuit (referred to as “image memory” below) provided in the pixel, which makes it possible to continuously display a still image without receiving a supply of image data from the outside, thereby reducing the power consumption for image display. Patent Document 2 discloses a technique for preventing an occurrence of a parasitic TFT in a TFT that has a slanted portion (tapered portion) at edges of the active layer.
In terms of the image memory, the use of a DRAM (Dynamic Random Access Memory) or an SRAM (Static Random Access Memory) has been proposed. Between the two, the SRAM is able to operate faster than the DRAM, and because there is no need to perform a refresh operation, which is required in the DRAM, the power consumption can be reduced. The SRAM has a flip-flop circuit that uses a plurality of TFTs including p-type and n-type TFTs. Even if a display device is provided with such image memories, a further reduction in driving voltages may be needed, depending on applications in which the display device is used.